2 Dec 2008 mjg59   » (Master)

Thintel

ICH8 docs, section 5.13.5.1:

To eliminate the audible noise caused by aggressive voltage ramps when exiting C4 states at a regular, periodic frequency, the ICH8 supports a method to slow down the
voltage ramp at the processor VR for certain break events.


Sounds good. Section 9.8.1.6:

C4_TIMING_CNT: Bit 6 Slow-C4 Exit Enable —When 1, this bit enables the Slow-C4 Exit functionality.

Well, hey, we can quirk this on and make life better for everyone oh wait section 9.8.1.4:

Bit 0 C-STATE_CONFIG_LOCK: When set to 1, this bit locks down the C-State configuration parameters. The following configuration bits become read-only when this bit is set:
...
The entire C4 Timing Control Register (C4_TIMING_CNT)


Thanks, Intel. Thintel.

Syndicated 2008-12-02 03:28:00 from Matthew Garrett

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